NEC 78K0S/KA1+ User Manual page 242

Remarks 1. For the reset timing of the power-on-clear circuit and low-voltage detector, refer to CHAPTER 15
POWER-ON-CLEAR CIRCUIT and CHAPTER 16 LOW-VOLTAGE DETECTOR.
2. f : System clock oscillation frequency
X
3. When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
Table 14-1. Hardware Statuses After Reset Acknowledgment (1/2)
Note 1
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Ports (P2 to P4, P12, P13) (output latches)
Port mode registers (PM2 to PM4, PM12)
Port mode control register (PMC2)
Pull-up resistor option registers (PU2, PU3, PU4, PU12)
Processor clock control register (PCC)
Preprocessor clock control register (PPCC)
Low-speed internal oscillation mode register (LSRCM)
Oscillation stabilization time select register (OSTS)
16-bit timer 00
8-bit timer 80
8-bit timer H1
Watchdog timer
A/D converter
Notes 1. Only the contents of PC are undefined while reset signal generation and while the oscillation stabilization
time elapses. The statuses of the other hardware units remain unchanged.
2. The status after reset is held in the standby mode.
242
CHAPTER 14 RESET FUNCTION
Hardware
Data memory
General-purpose registers
Timer counter 00 (TM00)
Capture/compare registers 000, 010 (CR000, CR010)
Mode control register 00 (TMC00)
Prescaler mode register 00 (PRM00)
Capture/compare control register 00 (CRC00)
Timer output control register 00 (TOC00)
Timer counter 80 (TM80)
Compare register (CR80)
Mode control register 80 (TMC80)
Compare registers (CMP01, CMP11)
Mode register 1 (TMHMD1)
Mode register (WDTM)
Enable register (WDTE)
Conversion result registers (ADCR, ADCRH)
Mode register (ADM)
Analog input channel specification register (ADS)
User's Manual U16898EJ3V0UD
Status After Reset
Contents of reset vector
table (0000H and
0001H) are set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H
FFH
00H
00H
02H
02H
00H
Undefined
0000H
0000H
00H
00H
00H
00H
00H
Undefined
00H
00H
00H
67H
9AH
Undefined
00H
00H