Block Diagram - NEC 78K0S/KA1+ User Manual

1.6 Block Diagram

TO00/TI010/P31
16-bit timer/event
counter 00
TI000/P30
8-bit timer 80
TOH1/P42 8-bit timer H1
Low-speed
internal oscillator
Watchdog timer
RxD6/P44
Serial interface
TxD6/P43
ANI0/P20 to
4
ANI3/P23
A/D converter
AV
REF
INTP0/P30
INTP1/P43
Interrupt control
INTP2/P31
INTP3/P41
Note In the 78K0S/KA1+, V
connect V to a stabilized GND (= 0 V).
SS
CHAPTER 1 OVERVIEW
78K0S
CPU
core
UART6
Internal
high-speed
RAM
functions alternately as the ground potential of the A/D converter. Be sure to
SS
User's Manual U16898EJ3V0UD
Flash
memory
Note
V V
DD SS
4
Port 2 P20 to P23
2
P30, P31
Port 3
P34
Port 4 6 P40 to P45
Port 12 3 P121 to P123
Port 13 P130
Power on clear/
POC/LVI
low voltage
control
indicator
Reset control
RESET/P34
System control
X1/P121
X2/P122
High-speed
internal oscillator
19