NEC 78K0S/KA1+ User Manual page 78

Figure 5-11. Status Transition of Default Start by Crystal/Ceramic Oscillation
Remark PCC: Processor clock control register
PPCC: Preprocessor clock control register
(3) External clock input circuit
If external clock input is selected by the option byte, the following is possible.
• High-speed operation
The accuracy of processing is improved as compared with high-speed internal oscillation (8 MHz (TYP.))
because an oscillation frequency of 1 to 10 MHz can be selected and an external clock with a small frequency
deviation can be supplied.
• Improvement of expandability
If the external clock input circuit is selected as the oscillator, the X2 pin can be used as an I/O port pin. For
details, refer to CHAPTER 4 PORT FUNCTIONS.
Figures 5-12 and 5-13 show the timing chart and status transition diagram of default start by external clock input.
78
CHAPTER 5 CLOCK GENERATORS
Power
application
V
DD
Reset by
power-on clear
Crystal/ceramic
oscillation selected
by option byte
Wait for clock
oscillation stabilization
Start with PCC = 02H,
PPCC = 02H
Clock division ratio
variable during
CPU operation
Interrupt
HALT
instruction
instruction
HALT
User's Manual U16898EJ3V0UD
> 2.1 V ±0.1 V
Reset signal
Interrupt
STOP
STOP