Multiple Interrupt Servicing - NEC 78K0S/KA1+ User Manual

Figure 12-9. Interrupt Request Acknowledgment Timing (When Interrupt Request Flag Is Set at Last
Clock During Instruction Execution)
Clock
CPU NOP
Interrupt
If an interrupt request flag (××IF) is set at the last clock of the instruction, the interrupt acknowledgment processing
starts after the next instruction is executed.
Figure 12-9 shows an example of the interrupt request acknowledgment timing for an interrupt request flag that is
set at the second clock of NOP (2-clock instruction). In this case, the MOV A, r instruction after the NOP instruction is
executed, and then the interrupt acknowledgment processing is performed.
Caution Interrupt requests will be held pending while the interrupt request flag registers (IF0, IF1) or
interrupt mask flag registers (MK0, MK1) are being accessed.

12.4.2 Multiple interrupt servicing

In order to perform multiple interrupt servicing in which another interrupt is acknowledged while an interrupt is
being serviced, the interrupt mask function must be used to mask interrupts for which a low priority is to be set.
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CHAPTER 12 INTERRUPT FUNCTIONS
MOV A, r
User's Manual U16898EJ3V0UD
8 clocks
Saving PSW and PC, jump
to interrupt servicing
Interrupt
servicing
program