NEC 78K0S/KA1+ User Manual page 154

8-bit single-chip microcontrollers
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(2) When the watchdog timer operation clock is the low-speed internal oscillation clock (f
instruction is executed
When the STOP instruction is executed, operation of the watchdog timer is stopped. After STOP mode is
released, operation stops for 34
operation was stopped. At this time, the counter is not cleared to 0 but holds its value.
Figure 9-7. Operation in STOP Mode (WDT Operation Clock: Low-Speed Internal Oscillation Clock)
Normal
operation
CPU operation
f
CPU
f
RL
Watchdog timer
Operating
<2> CPU clock: High-speed internal oscillation clock or external clock input
operation
CPU operation
f
CPU
f
RL
Watchdog timer
Operating
Note The operation stop time is 17
154
CHAPTER 9 WATCHDOG TIMER
µ
s (TYP.) and then counting is started again using the operation clock before the
<1> CPU clock: Crystal/ceramic oscillation clock
Operation
Note
stopped
STOP
Oscillation stopped
Operation stopped
Normal
STOP
Oscillation stopped
Operation stopped
µ
s (MIN.), 34
User's Manual U16898EJ3V0UD
Oscillation stabilization time
Oscillation stabilization time
(set by OSTS register)
Operating
Operation
Note
stopped
Normal operation
µ
µ
s (TYP.), and 67
s (MAX.).
) when the STOP
RL
Normal operation
Operating

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