NEC 78K0S/KA1+ User Manual page 236

(b) Release by reset signal generation
When the reset signal is generated, STOP mode is released and a reset operation is performed after the
oscillation stabilization time has elapsed.
Figure 13-6. STOP Mode Release by Reset Signal Generation
(1) If CPU clock is high-speed internal oscillation clock or external input clock
Reset signal
CPU status
System clock
oscillation
Note Operation is stopped (277
referenced.
Reset signal
CPU status
System clock
oscillation
Note Operation is stopped (276
referenced.
Remark f : System clock oscillation frequency
X
Table 13-5. Operation in Response to Interrupt Request in STOP Mode
Release Source
Maskable interrupt request
Reset signal generation
×: don't care
236
CHAPTER 13 STANDBY FUNCTION
STOP
instruction
Operation
STOP mode
mode
Oscillation Oscillation stops.
µ
s (MIN.), 544
(2) If CPU clock is crystal/ceramic oscillation clock
STOP
instruction
Operation
STOP mode
mode
Oscillation Oscillation stops.
µ
s (MIN.), 544
MK××
0
0
1
−
User's Manual U16898EJ3V0UD
Operation
Reset
Note
stops .
period
µ
s (TYP.), 1.075 ms (MAX.)) because the option byte is
Reset
Operation Oscillation
Note
period
stops . stabilization waits
Oscillation stabilization time
(2
µ
s (TYP.), 1.074 ms (MAX.)) because the option byte is
IE Operation
0 Next address instruction execution
1 Interrupt servicing execution
×
STOP mode held
×
Reset processing
Operation mode
Oscillation
Operation
mode
Oscillation
10 17
/f to 2 /f )
X X