NEC 78K0S/KA1+ User Manual page 205

(g) Noise filter of receive data
The R D6 signal is sampled with the base clock output by the prescaler block.
X
If two sampled values are the same, the output of the match detector changes, and the data is sampled as
input data.
Because the circuit is configured as shown in Figure 11-21, the internal processing of the reception operation
is delayed by two clocks from the external signal status.
Base clock
R D6/P44
X
(h) SBF transmission
When the device is incorporated in LIN, the SBF (Synchronous Break Field) transmission control function is
used for transmission.
Operation.
When bit 7 (POWER6) of asynchronous serial interface mode register 6 (ASIM6) is set to 1, the TxD6 pin
outputs high level. Next, when bit 6 (TXE6) of ASIM6 is set to 1, the transmission enabled status is entered,
and SBF transmission is started by setting bit 5 (SBTT6) of asynchronous serial interface control register 6
(ASICL6) to 1.
Thereafter, a low level of bits 13 to 20 (set by bits 4 to 2 (SBL62 to SBL60) of ASICL6) is output. Following
the end of SBF transmission, the transmission completion interrupt request (INTST6) is generated and
SBTT6 is automatically cleared. Thereafter, the normal transmission mode is restored.
Transmission is suspended until the data to be transmitted next is written to transmit buffer register 6 (TXB6),
or until SBTT6 is set to 1.
1
T D6
X
INTST6
SBTT6
Remark T D6: T D6 pin (output)
X X
INTST6: Transmission completion interrupt request
SBTT6: Bit 5 of asynchronous serial interface control register 6 (ASICL6)
CHAPTER 11 SERIAL INTERFACE UART6
Figure 11-21. Noise Filter Circuit
Internal signal A
In Q
For the transmission operation of LIN, see Figure 11-1
Figure 11-22. SBF Transmission
2 3 4 5 6
User's Manual U16898EJ3V0UD
In
LD_EN
Match detector
7 8 9 10 11 12
Q Internal signal B
LIN Transmission
13 Stop
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