NEC 78K0S/KA1+ User Manual page 280

Figure 18-15. Format of Flash Programming Command Register (FLCMD)
Address: FFA3H
Symbol 7
FLCMD 0
FLCMD2
0
0
1
1
Note If a value other than the above is set and the self programming mode is set, the self programming
mode is canceled immediately and no execution occurs. At this time, the flag of the PFS register is
not set.
(5) Flash address pointers H and L (FLAPH and FLAPL)
These registers are used to specify the start address of the flash memory when the memory is erased, written,
or verified in the self programming mode.
FLAPH and FLAPL consist of counters, and they are incremented until the values match with those of
FLAPHC and FLAPLC when the programming command is not executed. When the programming command
is executed, therefore, set the value again.
These registers are set with a 1-bit or 8-bit memory manipulation instruction.
reset signal generation makes these registers undefined.
280
CHAPTER 18 FLASH MEMORY
After reset: 00H R/W
6 5
0 0
FLCMD1 FLCMD0
0 1 Internal verify
1 1 Block erase
0 0 Block blank check
0 1 Byte write
Note
Other than above Setting prohibited
User's Manual U16898EJ3V0UD
4 3 2
0 0 FLCMD2
Command Name
This command is used to check if
data has been correctly written to the
flash memory. After data has been
written to the memory, execute this
command by specifying a block
number, start address, and end
address. If an error occurs, bit 1
(VCERR) or bit 2 (WEPRERR) of the
flash status register (PFS) is set to 1.
This command is used to erase
specified block. It is used both in the
on-board mode and self
programming mode.
This command is used to check if the
specified block has been erased.
This command is used to write 1-byte
data to the specified address in the
flash memory. Specify the write
address and write data, then execute
this command.
If 1 is written to a bit that has not
been erased (a bit for which the data
is 0), then bit 2 (WEPRERR) of the
flash status register (PFS) becomes
1.
1 0
FLCMD1 FLCMD0
Function