NEC 78K0S/KA1+ User Manual page 163

Cautions 2. If a bit other than ADCS of ADM is manipulated while A/D conversion is stopped (ADCS = 0)
and then A/D conversion is started, execute two NOP instructions or an instruction
equivalent to two machine cycles, and set ADCS to 1.
3. A/D conversion must be stopped (ADCS = 0) before rewriting bits FR0 to FR2.
4. Be sure to clear bits 6, 2, and 1 to 0.
(2) Analog input channel specification register (ADS)
This register specifies the input port of the analog voltage to be A/D converted.
ADS can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 10-5. Format of Analog Input Channel Specification Register (ADS)
Address: FF81H
Symbol
ADS
Caution Be sure to clear bits 2 to 7 of ADS to 0.
(3) 10-bit A/D conversion result register (ADCR)
This register is a 16-bit register that stores the A/D conversion result. The higher six bits are fixed to 0. Each
time A/D conversion ends, the conversion result is loaded from the successive approximation register, and is
stored in ADCR in order starting from bit 1 of FF19H. FF19H indicates the higher 2 bits of the conversion result,
and FF18H indicates the lower 8 bits of the conversion result.
ADCR can be read by a 16-bit memory manipulation instruction.
Reset signal generation makes ADCR undefined.
Figure 10-6. Format of 10-Bit A/D Conversion Result Register (ADCR)
Address: FF18H, FF19H
Symbol
ADCR
0 0
Caution When writing to the A/D converter mode register (ADM) and analog input channel specification
register (ADS), the contents of ADCR may become undefined. Read the conversion result
following conversion completion before writing to ADM and ADS. Using timing other than the
above may cause an incorrect conversion result to be read.
CHAPTER 10 A/D CONVERTER
After reset: 00H
7 6 5
0 0 0
ADS1 ADS0
0 0 ANI0
0 1 ANI1
1 0 ANI2
1 1 ANI3
After reset: Undefined
FF19H
0 0 0 0
User's Manual U16898EJ3V0UD
R/W
4 3 2
0 0 0 ADS1
Analog input channel specification
R
1 0
ADS0
FF18H
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