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CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( PD78058F SUBSERIES)
SIO0
SCK0
SB0 (SB1)
ACKD
(b) When ACK signal is output after 9th clock of SCK0
SIO0
6
SCK0
D2
SB0 (SB1)
ACKD
(c) Clear timing when transfer start is instructed in BUSY
SIO0
SCK0
6
7
SB0 (SB1)
D2
ACKD
SCK0
6
7
SB0 (SB1)
D2
BSYE
320
Figure 16-24. ACKD Operations
(a) When ACK signal is output at 9th clock of SCK0
6
7
8
9
D2
D1
D0
ACK
7
8
9
D1
D0
8
9
D1
D0
Figure 16-25. BSYE Operation
8
9
D1
D0
When BSYE = 1 at this point
Transfer Start
Instruction
Transfer Start
Transfer Start
Instruction
ACK
Transfer Start
Instruction
BUSY
ACK
ACK
BUSY
If reset during this period and
BSYE = 0 at the falling edge of SCK0
Transfer Start
D7
D6
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