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CHAPTER 17 SERIAL INTERFACE CHANNEL 0 ( PD78058FY SUBSERIES)
Figure 17-22. Data Transmission from Master to Slave
Master Device Operation
Write SIO0
COI
ACKD
CMDD
RELD
L
CLD
P27
H
L
WUP
L
BSYE
L
ACKE
CMDT
L
RELT
CLC
L
WREL
L
SIC
INTCSI0
Transfer Line
SCL
SDA0
Slave Device Operation
Write SIO0
COI
ACKD
CMDD
L
RELD
CLD
P27
WUP
BSYE
H
H
ACKE
L
CMDT
L
RELT
L
CLC
L
WREL
H
SIC
INTCSI0
CSIE0
H
L
P25
L
PM25
L
PM27
374
(Both Master and Slave Selected 9-Clock Wait) (1/3)
(a) Start Condition to Address
SIO0
Address
1
2 3 4 5 6 7 8
A6
A5 A4 A3 A2 A1 A0 W ACK
9
SIO0
Data
1 2 3 4 5
D7 D6 D5 D4 D3
SIO0
FFH
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