Interrupt Servicing Operations; Non-Maskable Interrupt Acknowledge Operation - NEC PD78056F User Manual

Pd78058f series; pd78058fy series 8-bit single-chip microcontrollers
Table of Contents

Advertisement

21.4 Interrupt Servicing Operations

21.4.1 Non-maskable interrupt acknowledge operation

A non-maskable interrupt request is received without condition even when in the interrupt request reception
prohibited state. It does not undergo interrupt priority control and has highest priority over all other interrupts.
If a non-maskable interrupt request is acknowledged, the acknowledged interrupt is saved in the program status
word (PSW) and then program counter (PC), the IE and ISP flags are reset to 0, and the vector table contents are
loaded into PC and branched.
A new non-maskable interrupt request generated during execution of a non-maskable interrupt service program
is received after the execution of the non-maskable interrupt service program that is currently processing is completed
(after the RETI command is executed) and 1 command of the main routine is executed. If a new non-maskable interrupt
request is generated twice or more during non-maskable interrupt service program execution, only one non-maskable
interrupt request is acknowledged after termination of the non-maskable interrupt service program execution.
The flowchart from the time a non-maskable interrupt request is generated until it is received is shown in Figure
21-10, the non-maskable interrupt request acknowledge timing is shown in Figure 21-11 and reception operations
in cases where multiple non-maskable interrupt requests are generated are shown in Figure 21-12.
CHAPTER 21 INTERRUPT AND TEST FUNCTIONS
491

Advertisement

Table of Contents
loading

Table of Contents