External Interrupt Mode Register 0 Format - NEC PD78056F User Manual

(4) External interrupt mode register (INTM0, INTM1)
These registers set the valid edge for INTP0 to INTP6.
INTM0 and INTM1 are set by 8-bit memory manipulation instructions.
RESET input sets these registers to 00H.
Figure 21-5. External Interrupt Mode Register 0 Format
Symbol 7 6 5
INTM0 ES31 ES30 ES21
Caution Set the valid edge of the INTP0/TI00/P00 pin after setting bits 1 to 3 (TMC01 to TMC03)
of the 16-bit timer mode control register (TMC0) to 0, 0, and 0, respectively, and then
stopping timer operation.
486
CHAPTER 21 INTERRUPT AND TEST FUNCTIONS
4 3 2 1
ES20 ES11 ES10 0
After
Address
0
Reset
0 FFECH 00H
ES11 ES10 INTP0 Valid Edge Selection
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1 1 Both falling and rising edges
ES21 ES20 INTP1 Valid Edge Selection
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1
1 Both falling and rising edges
ES31 ES30 INTP2 Valid Edge Selection
0 0 Falling edge
0 1 Rising edge
1 0 Setting prohibited
1 1 Both falling and rising edges
R/W
R/W