Port 2 ( Pd78058F Subseries); P20, P21, P23 To P26 Block Diagram - NEC PD78056F User Manual

6.2.3 Port 2 ( PD78058F Subseries)

Port 2 is an 8-bit input/output port with output latch. P20 to P27 pins can specify the input mode/output mode in
1-bit units with the port mode register 2 (PM2). When P20 to P27 pins are used as input ports, an on-chip pull-up
resistor can be used to them in 8-bit units with a pull-up resistor option register L (PUOL).
Alternate functions include serial interface data input/output, clock input/output, automatic transmit/receive busy
input, and strobe output.
RESET input sets port 2 to input mode.
Figures 6-5 and 6-6 show block diagrams of port 2.
Cautions 1. When used as a serial interface pin, set the input/output and output latch according to its
functions. For the setting method, refer to Figure 16-4 Serial Operating Mode Register 0
Format and Figure 18-3 Serial Operating Mode Register 1 Format.
2. When reading the pin state in SBI mode, set PM2n bit of PM2 to 1 (n = 5, 6) (See 16.4.3 (10),
How to determine the slave busy state.)
WR
PUO
RD
WR
PORT
Output Latch
(P20, P21, P23 to P26)
WR
PM
PM20, PM21
PM23 to PM26
Alternate Function
PUO : Pull-up resistor option register
PM : Port mode register
RD : Port 2 read signal
WR : Port 2 write signal
CHAPTER 6 PORT FUNCTIONS
Figure 6-5. P20, P21, P23 to P26 Block Diagram
PUO2
Selector
AV
DD
P-ch
P20/SI1,
P21/SO1,
P23/STB,
P24/BUSY,
P25/SI0/SB0,
P26/SO0/SB1
133