Table of Contents
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2.8 Outline of Function
Item
ROM
Internal
memory
High-speed RAM
Buffer RAM
Expansion RAM
Memory space
General register
Minimum
With main system clock selected
instruction
execution
With subsystem clock selected
time
Instruction set
I/O port
A/D converter
D/A converter
Serial interface
Timer
Timer output
Clock output
Buzzer output
Notes
1. The capacities of the internal PROM and the internal high-speed RAM can be changed using the
memory switching register (IMS).
2. The capacity of the internal expansion RAM can be changed using the internal expansion RAM size
switching register (IXS).
56
CHAPTER 2 OUTLINE ( PD78058FY SUBSERIES)
Part Number
PD78056FY
Mask ROM
48 Kbytes
1024 bytes
32 bytes
None
64 Kbytes
8 bits
8
4 banks
0.4 s/0.8 s/1.6 s/3.2 s/6.4 s/12.8 s (at 5.0-MHz operation)
122 s (at 32.768-kHz operation)
• 16-bit operation
• Multiply/divide (8 bits
• Bit manipulate (set, reset, test, and Boolean operation)
• BCD adjust, etc.
• Total
• CMOS input
• CMOS I/O
• N-ch open-drain I/O : 4
8-bit resolution
8-bit resolution
• 3-wire serial I/O/2-wire serial I/O/I
• 3-wire serial I/O mode (Max. 32-byte on-chip auto-transmit/receive) : 1 channel
• 3-wire serial I/O/UART mode selectable : 1 channel
• 16-bit timer/event counter : 1 channel
• 8-bit timer/event counter
• Watch timer
• Watchdog timer
Three outputs: (14-bit PWM output enable: 1)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz,
2.5 MHz, 5.0 MHz (at 5.0-MHz operation with main system clock)
32.768 kHz (at 32.768-kHz operation with subsystem clock)
1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz (at 5.0-MHz operation with main system
clock)
PD78058FY
60 Kbytes
1024 bytes
8 bits, 16 bits
8 bits)
: 69
: 2
: 63
8 channels
2 channels
2
C bus mode selection possible : 1 channel
: 2 channels
: 1 channel
: 1 channel
PD78P058FY
PROM
Note 1
60 Kbytes
Note 1
1024 bytes
Note 2
1024 bytes
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