Table of Contents
Advertisement
5.3 Instruction Address Addressing
An instruction address is determined by program counter (PC) contents. The contents of PC are normally
incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each
time another instruction is executed. When a branch instruction is executed, the branch destination information is
set to the PC and branched by the following addressing. (For details of instructions, refer to 78K/0 Series User's
Manual – Instruction (U12326E).
5.3.1 Relative addressing
[Function]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched. The
displacement value is treated as signed two's complement data (–128 to +127) and bit 7 becomes a sign bit. In
the relative addressing modes, execution branches in a relative range of –128 to +127 from the first address of
the next instruction.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
[Illustration]
15
15
15
PC
When S = 0, all bits of
When S = 1, all bits of
112
CHAPTER 5 CPU ARCHITECTURE
PC
+
8
7
6
S
jdisp8
are 0.
are 1.
0
PC indicates the start address
...
of the instruction
after the BR instruction.
0
0
Advertisement
Table of Contents
