Serial Interface Channel 0 Block Diagram - NEC PD78056F User Manual

CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( PD78058F SUBSERIES)
Serial Operating Mode Register 0
CSIE0 COI WUP
Control
Circuit
SI0/SB0/
P25
PM25
Output
Control
SO0/SB1/
P26
PM26
Output
Control
CLD
SCK0/
P27
PM27
Output
Control
Remark Output Control performs selection between CMOS output and N-ch open-drain output.
Figure 16-2. Serial Interface Channel 0 Block Diagram
Internal Bus
CSIM CSIM CSIM CSIM CSIM
04 03 02 01 00
Selector
P25
Output Latch
Selector
P26 Output Latch
P27
Output Latch
Slave Address
BSYE ACKD ACKE ACKT CMDD RELD CMDT RELT
Register (SVA)
SVAM
Match
CLR SET
Serial I/O Shift
D Q
Register 0 (SIO0)
Bus Release/
ACKD
Command/
WUP
CMDD
Acknowledge
RELD
Detector
Serial Clock
Counter
TO2
Serial Clock
Selector
Control Circuit
CSIM00 CSIM00
CSIM01 CSIM01
CLD SIC SVAM
Interrupt Timing
Specify Register
Internal Bus
Serial Bus Interface
Control Register
Busy/
Acknowledge
Output Circuit
Interrupt
Request
Signal
INTCSI0
Generator
Selector
f /2 to f /2 8
xx xx
4
TCL33 TCL32 TCL31 TCL30
Timer Clock
Select
Register 3
289