Test Functions; Registers Controlling The Test Function; Basic Configuration Of Test Function; Test Input Factors - NEC PD78056F User Manual

Pd78058f series; pd78058fy series 8-bit single-chip microcontrollers

Table of Contents

21.5 Test Functions

When a clock timer overflow occurs and when the port 4 falling edge is detected, a corresponding test input flag

is set (1) and a standby release signal is generated.

Unlike the interrupt function, vector processing is not executed.

There are two test input factors as shown in Table 21-5. The basic configuration is shown in Figure 21-18.

The test function is controlled by the following three registers.

• Interrupt request flag register 1L (IF1L)

• Interrupt mask flag register 1L (MK1L)

• Key return mode register (KRM)

The names of the test input flags and test mask flags corresponding to the test input signals are listed in Table

Test Input Signal Name

CHAPTER 21 INTERRUPT AND TEST FUNCTIONS

Table 21-5. Test Input Factors

Watch timer overflow

Falling edge detection at port 4

Figure 21-18. Basic Configuration of Test Function

Internal bus

Remark IF : test input flag

MK: test mask flag

Table 21-6. Flags Corresponding to Test Input Signals

Test Input Flag

release signal

Test Mask Flag