Timer Clock Select Register 2 Format - NEC PD78056F User Manual

Pd78058f series; pd78058fy series 8-bit single-chip microcontrollers
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Figure 11-2. Timer Clock Select Register 2 Format
7
6
5
Symbol
TCL27
TCL26
TCL25 TCL24
TCL2
TCL22 TCL21 TCL20
0
0
0
f
0
0
1
f
0
1
0
f
0
1
1
f
1
0
0
f
1
0
1
f
1
1
0
f
1
1
1
f
TCL24
7
0
f
/2
XX
1
f
(32.768 kHz)
XT
TCL27 TCL26 TCL25
0
Buzzer output disable
1
0
0
f
1
0
1
f
1
1
0
f
1
1
1
Setting prohibited
Caution When rewriting TCL2 to other data, stop the timer operation beforehand.
Remarks 1. f
XX
2. f
X
3. f
XT
4.
5. MCS : Bit 0 of oscillation mode selection register (OSMS)
6. Figures in parentheses apply to operation with f
CHAPTER 11 WATCHDOG TIMER
4
3
2
1
0
0
TCL22 TCL21 TCL20
Watchdog Timer Count Clock Selection
3
3
/2
f
/2
(625 kHz)
XX
X
4
4
/2
f
/2
(313 kHz)
XX
X
5
5
/2
f
/2
(156 kHz)
XX
X
6
6
/2
f
/2
(78.1 kHz)
XX
X
7
7
/2
f
/2
(39.1 kHz)
XX
X
8
8
/2
f
/2
(19.5 kHz)
XX
X
9
9
/2
f
/2
(9.8 kHz)
XX
X
11
11
/2
f
/2
(2.4 kHz)
XX
X
Watch Timer Count Clock Selection
MCS = 1
7
f
/2
(39.1 kHz)
X
Buzzer Output Frequency Selection
9
9
/2
f
/2
(9.8 kHz)
XX
X
10
10
/2
f
/2
(4.9 kHz)
XX
X
11
11
/2
f
/2
(2.4 kHz)
XX
X
: Main system clock frequency (f
: Main system clock oscillation frequency
: Subsystem clock oscillation frequency
: Don't care
After
Address
Reset
FF42H
00H
MCS = 1
4
f
/2
X
5
f
/2
X
6
f
/2
X
7
f
/2
X
8
f
/2
X
9
f
/2
X
10
f
/2
X
12
f
/2
X
MCS = 0
8
f
/2
(19.5 kHz)
X
MCS = 1
10
f
/2
(4.9 kHz)
X
11
f
/2
(2.4 kHz)
X
12
f
/2
(1.2 kHz)
X
or f
/2)
X
X
= 5.0 MHz or f
X
R/W
R/W
MCS = 0
(313 kHz)
(156 kHz)
(78.1 kHz)
(39.1 kHz)
(19.5 kHz)
(9.8 kHz)
(4.9 kHz)
(1.2 kHz)
MCS = 0
= 32.768 kHz.
XT
249

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