Block Diagram Of Clock Generator - NEC PD78056F User Manual

FRC
XT1/P07
Subsystem
Clock
XT2
Oscillator
X1
Main
f
X
System
X2
Clock
Oscillator
STOP
156
CHAPTER 7 CLOCK GENERATOR
Figure 7-1. Block Diagram of Clock Generator
f
XT
Prescaler
Scaler
f
X
f
2
f
XX 2
f
2
XX
2
f 2
XX
MCS
Oscillation Mode
Selection Register
Prescaler
1/2
f
XT
2
f
XX
XX
4
2 Standby
3
Control
Circuit
3
MCC FRC CLS CSS PCC2 PCC1
PCC0
Processor Clock Control Register
Internal Bus
Watch Timer,
Clock Output
Function
Clock to
Peripheral
Hardware
Wait
CPU Clock
Control
(f )
CPU
Circuit
To INTP0
Sampling Clock