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CHAPTER 16 SERIAL INTERFACE CHANNEL 0 ( PD78058F SUBSERIES)
(b) Serial bus interface control register (SBIC)
SBIC is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets SBIC to 00H.
Symbol
7
6
5
SBIC BSYE ACKD ACKE ACKT CMDD RELD CMDT RELT
R/W
When RELT = 1, SO0 Iatch is set to 1. After SO0 Iatch setting, automatically cleared to 0.
RELT
Also cleared to 0 when CSIE0 = 0.
R/W
When CMDT = 1, SO0 Iatch is cleared to 0. After SO0 latch clearance, automatically cleared to 0.
CMDT
Also cleared to 0 when CSIE0 = 0.
CSIE0: Bit 7 of Serial Operation Mode Register 0 (CSIM0)
(c) Interrupt timing specify register (SINT)
SINT is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets SINT to 00H.
Symbol
7
6
5
SINT
0
CLD
SIC
Caution Be sure to set bits 0 to 3 to 0.
Notes 1. Bit 6 (CLD) is a read-only bit.
2. When CSIE0 = 0, CLD becomes 0.
Remark CSIIF0: Interrupt request flag corresponding to INTCSI0
CSIE0 : Bit 7 of Serial Operation Mode Register 0 (CSIM0)
4
3
2
1
0
4
3
2
1
SVAM
0
0
0
R/W
Address
After Reset
FF61H
00H
0
Address
After Reset
0
FF63H
00H
SIC
INTCSI0 Interrupt Source Selection
CSIIF0 is set upon termination of serial interface
0
channel 0 transfer
CSIIF0 is set upon bus release detection or
1
termination of serial interface channel 0 transfer
R
CLD
SCK0/P27 Pin Level
0
Low level
1
High level
R/W
R/W
R/W
R/W
Note 1
Note 2
333
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