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5.3.3
Clock Output Procedure
Clock pulse output is performed by the following procedure.
(i)
Set the clock output mode register.
(ii) Write 0 to the P22 output latch.
(iii) Set the port 2 input/output mode to output.
This procedure may be reversed depending on the treatment of P22/PCL prior to clock output.
Example
1.
To output a 65.5 kHz (at 4.19 MHz operation) clock from the PCL/P22 pin. (The PCL/P22 pin outputs
the clock from the high-impedance state.)
MOV
MOV
CLR1
MOV
MOV
2.
To output
MOV
OUT
MOV
MOV
MOV
MOV
5.3.4
Examle of Remote Control Application
The PD75402A clock output functions can be used in remote control applications. The remote control output
carrier frequency is selected by the clock frequency selection bits of the clock output mode register. Pulse output
enabling/disabling is performed by software control of the enable/disable bit.
When switching between clock output enabled/disabled states, consideration has been given to ensuring that
a short pulse is not output.
CLOM.3
PCL Pin
Output
CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
A, #1011B
CLOM, A
PORT2.2
XA, #04H
PMGB, XA
. (The PCL/P22 pin outputs the clock from the low-impedance state.)
A, #0
PORT2, A
XA, #04H
PMGB, XA
A, #1000B
CLOM, A
Fig. 5-20 Example of Remote Control Application
; CLOM = 1011B
; P22
0
; PMGB = 00000100B
; P22
0
; CLOM
1000B
65
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