System Clock Oscillation Circuit External Circuitry; Example Of Poor Resonator Connection Circuit - NEC PD75402A User Manual

(2) System clock oscillation circuit
The system clock oscillation circuit oscillates by means of a crystal resonator or ceramic resonator connected
to the X1 and X2 pins (standard: 4.194304 MHz).
An external clock can also be input.
Fig. 5-12 System Clock Oscillation Circuit External Circuitry
(a) Crystal/ceramic oscillation
V
DD
Crystal Resonator
or Ceramic Oscillator
Note 1. When an external clock is input, STOP mode cannot be set. If STOP mode is set, the X1 pin is shorted
to V (GND potential) internally to suppress clock oscillation circuit leakage.
SS
2. When using the system clock generation circuit the area enclosed in dotted line in Fig. 5-12 should be
wired in order to avoid effects of wiring capacitance etc., as shown below.
• Minimize the length of wiring
• Do not cross other signal lines, or position wiring close to a variable high current.
• The connecting point of the oscillator capacitor should always be of the same potential as V
not connect it to the supply pattern where there is a high current.
• Do not pick up the signal from the oscillator.
Fig. 5-13 Example of Poor Resonator Connection Circuit (1/2)
(a) Long connection circuit wiring
PD75402A
X1
CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
PD75402A
V
DD
X1
X2
(Standard 4.194304 MHz)
V
DD
V
DD
X2
(b) External clock
External
Clock
(b) Crossed signal lines
PORTn
n = 0,1,2,3,5,6,
PD75402A
X1 X2
PD75402A
X1
X2
. Do
DD
V
DD
V
DD
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