NEC PD75402A User Manual page 113

Wake-up function specification bit (W)
0
WUP
1
Note If WUP = 1 is set during BUSY signal output, BUSY is not released. With the SBI, the BUSY signal is output
after the BUSY release directive until the next fall of the serial clock (SCK). when setting WUP = 1, it is
necessary to confirm that the SB0 pin has been driven high after BUSY is released before setting WUP =
1.
Signal from address comparator (R)
COI*
When slave address register (SVA) and
shift register data do not match.
* A COI read is valid only before the start or after completion of a serial transfer. During a transfer an indeterminate
value will be read.
Also, COI data written by an 8-bit manipulation instruction is ignored.
Serial interface operation enable/disable specification bit (W)
1
CSIE
102
CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
IRQCSI set at end of every serial transfer in SBI mode mask state.
User only when functioning as a slave in SBI mode. IRQCSI is set only when the
address received after bus release matches the slace address register data (wake-up
status). SB0 is high impedance.
Clearing Conditions (COI = 0)
Shift Register Serial Clock
Operation Counter
Shift operation
Count operation
enabled
Setting Condition (COI = 1)
When slave address register (SVA) and shift
register data match.
IRQCSI Flag SO/SB0 & SI Pins
Function in each
Settable
mode plus port 0
function