Pd75402A I/O Map - NEC PD75402A User Manual

CHAPTER 3. FEATURES OF ARCHITECTURE AND MEMORY MAP
Hardware Name (Symbol)
Address
b3
F80H
Stack pointer (SP)
F85H
Basic interval timer mode register (BTM)
F86H
Basic interval timer (BT)
FB2H (IME)
FB3H Processor clock control register (PCC)
FB4H
INT0 mode register (IM0)
FB8H 0
FBDH 0
FBEH 0
FBFH
0
FD0H Clock output mode register (CLOM)
FDCH Pull-up resistor specify register
Group A (POGA)
Remarks 1. IE is an interrupt enable flag.
2. IRQ is an interrupt request flag.
Table 3-4 PD75402A I/O Map (1/2)
b2 b1 b0
0 IEBT IRQBT
0 IECSI IRQCSI
0 IE0 IRQ0
0 IE2 IRQ2
No. of Manipulatable
Addressing
1 Bit 4 Bits 8 Bits
W
W
R
W
W
R/W R/W
R/W R/W
R/W R/W
R/W R/W
W
W
Bit
Manipula- Remarks
tion
Bit 0 is fixed to 0.
11 must always
be written in
bit 1, 0.
Manipulation
by EI. DI instruc-
tion
Bit 2 is fixed to 0.
fmem. bit
29