Table of Contents
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CHAPTER 1. GENERAL ...............................................................................................................................
1.1
OUTLINE OF FUNCTIONS . ..........................................................................................................................
1.2
ORDERING INFORMATION AND QUALITY GRADE ..................................................................................
1.3
DIFFERENCES BETWEEN PD75402A AND PD75402, 75P402 ..............................................................
1.4
BLOCK DIAGRAM ..........................................................................................................................................
1.5
PIN CONFIGURATION ...................................................................................................................................
1.5.1
28-Pin Plastic DIP (600 mil), Shrink DIP (400 mil) .....................................................................
1.5.2
CHAPTER 2. PIN FUNCTIONS .................................................................................................................. 10
2.1
PD75402A PIN FUNCTION LIST ................................................................................................................
2.1.1
Port Pin List ....................................................................................................................................
2.1.2
List of Pins Other than Port Pins .................................................................................................
2.2
NORMAL OPERATING MODE ......................................................................................................................
2.2.1
P00 to P03 (Port 0), P10, P12 (Port 1) .........................................................................................
2.2.2
2.2.3
SCK, SO/SB0, SI .............................................................................................................................
2.2.4
INT0 .................................................................................................................................................
2.2.5
INT2 .................................................................................................................................................
2.2.6
PCL ..................................................................................................................................................
2.2.7
X1, X2 ..............................................................................................................................................
2.2.8
RESET (Reset) ................................................................................................................................
2.2.9
V
...................................................................................................................................................
2.2.10
V
...................................................................................................................................................
2.3
PROM MODE ..................................................................................................................................................
2.3.1
A0 to A14 (Address) ......................................................................................................................
2.3.2
O0 to O7 (Data) ..............................................................................................................................
2.3.3
CE (Chip Enable) ............................................................................................................................
2.3.4
OE (Output Enable) .......................................................................................................................
2.3.5
V
....................................................................................................................................................
2.3.6
V
...................................................................................................................................................
2.3.7
V
...................................................................................................................................................
2.4
PIN INPUT/OUTPUT CIRCUITS ...................................................................................................................
2.5
UNUSED PIN TREATMENT ..........................................................................................................................
2.6
NOTES ON USE OF P00 PIN AND RESET PIN ...........................................................................................
CHAPTER 3. FEATURES OF ARCHITECTURE AND MEMORY MAP............................................... 21
3.1
DATA MEMORY BANK CONFIGURATION AND ADDRESSING MODES ...............................................
3.1.1
Data Memory Bank Configuration ..............................................................................................
3.1.2
Data Memory Addressing Modes ...............................................................................................
3.2
MEMORY-MAPPED I/O ................................ ..............................................................................................
CONTENTS
10 mm) ....................................................................................................
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