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Fig. 5-25 Serial Operating Mode Register (CSIM) Format (1/2)
Address
7
6
FE0H
CSIE
COI
Remarks
(R) Read only
(W) Write only
Note
0 must be written to CSIM bits 4, 2, 0.
Serial clock selection bit (W)
CSIM1
0
1
Remarks
( ) When f
= 4.19 MHz
XX
Serial interface operating mode selection bit (W)
CSIM3
0
1
CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
5
4
3
WUP
0
CSIM3
Signal from Address Comparator (R)
Serial Interface Operation Enable/Disable Specification Bit (W)
Serial Clock
3-Wire Serial I/O Mode
Input clock to SCK pin from off chip
4
f
/2
(262 kHz)
XX
Shift Register
Operating Mode
Bit Order
SIO
3-wire serial
7 to 0
I/O mode
(MBS-first transfer)
SIO
7 to 0
SBI mode
(MBS-first transfer)
2
1
0
0
CSIM1
0
Serial Clock Selection Bit (W)
Serial Interface Operating Mode Selection Bit (W)
Wake-up Function Specification Bit (W)
SBI Mode
SO Pin Function
XA
SO/P02
(CMOS output)
SB0/P02
XA
(N-ch open-drain
input/output)
Symbol
CSIM
SCK Pin Mode
Input
Output
SI Pin Function
SI/P03
(Input)
P03 input
75
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