NEC PD75402A User Manual page 91

4-bit single-chip microcomputer
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Fig. 5-26 Serial Bus Interface Control Register (SBIC) Format (3/3)
Acknowledge enable bit (R/W)
0
ACKE
1
Acknowledge detection flag (R)
ACKD
Busy enable bit (R/W)
0
BSYE
1
Example
1.
To output the command signal.
SET1
2.
To test RELD and CMDD, and perform different processing according to the type of receive data.
This interrupt routine is only performed when WUP = 1 and there is an address match.
SKF
BR
SKT
BR
CMD
DATA :
ADRS :
80
CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
Disables automatic output of the acknowledge signal (ACK) (outpt by ACKT is
possibel).
When set before end of transfer
When set after end of transfer
Clearing Conditions (ACKD = 0)
When a transfer is started
When RESET is input
Disablin of automatic busy signal output
Busy signal output is stopped in synchronization with the fall of SCK immediately
after execution ofthe clearing instruction.
The busy signal is output in synchronization with the fall or SCK following the
acknowledge signal.
CMDT
RELD
;
Test RELD
!ADRS
CMDD
;
Test CMDD
!DATA
:
...............
;
Command interpretation
...............
;
Data processing
...............
;
Address decoding
ACK is output is synchronization with the 9th
SCK clock cycle.
ACK is output in synchronization with SCK
immediately after execution of the setting
instruction.
Setting Condition (ACKD = 1)
When the acknowledge signal (ACK) is de-
tected (Synchronized with rise of SCK)

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