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16.3 STATUS REGISTER
The status register is a four-bit read-only register that retains the start and stop states in two-wire bus mode
and the contents of the current clock counter.
16.3.1 SBBSY (Serial Bus Busy) Flag
The SBBSY flag, mapped to b
bus mode.
The SBBSY flag is valid only when two-wire bus mode is selected by the SB flag of the serial mode register.
When the start condition is detected, the SBBSY flag is set to 1. When the stop condition is detected, the SBBSY
flag is reset to 0.
When serial I/O mode is selected by setting the contents of the serial mode register, the SBBSY flag is reset
to 0 and remains set to 0 until two-wire bus mode is selected.
This means that the SBBSY flag does not change in serial I/O mode.
When neither transmission nor reception is performed, testing of the SBBSY flag in two-wire bus mode
enables the system to determine whether other devices are communicating.
16.3.2 SBSTT (Serial Bus Start Test) Flag
The SBSTT flag, mapped to b1 of the status register, detects the start condition in two-wire bus mode.
The SBSTT flag is valid only when two-wire bus mode is selected by setting the SB flag of the serial mode
register. When the start condition is detected, the SBSTT flag is set to 1. When the contents of the clock counter
become 9, the SBSTT flag is reset to 0.
16.3.3 SIO0SF9 (Serial I/O Shift 9 Clock) Flag
The SIO0SF9 flag, mapped to b
become 9. When the contents of the clock counter become 0 or 1, the SIO0SF9 flag is reset to 0.
In master mode of two-wire bus mode, the contents of the flag that indicates whether the slave has returned
an acknowledgement must be read after the SIO0SF9 flag becomes 1 but before the flag becomes 1 again.
The SIO0SF9 flag is not influenced by the contents of the serial mode register. This means that the SIO0SF9
flag is set when the contents of the clock counter become 9, even in serial I/O mode.
Fig. 16-2 Configuration of Status Register
Bit position
b
3
Flag name
SIO0SF8
SIO0SF9
(LSB) of the status register (RF: 28H), detects the busy signal in two-wire
0
of the status register, is set to 1 when the contents of the clock counter
2
b
b
b
2
1
0
SBSTT
SBBSY
PD17062
207
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