NEC PD17062 Datasheet page 72

Table 9-1 Peripheral Hardware Control Functions of Control Registers (3/5)
Control register
Register Ad- Read/
dress write
A/D converter
21H R/W
controll
register
Port 1C group
I/O select
27H R/W
register
Port 1B bit I/O
35H R/W
select register
Port 0B bit I/O
36H R/W
select register
Port 0A bit I/O
37H R/W
select register
Serial I/O0
mode select
08H R/W
register
Serial I/O0
wait control 18H R/W
register
Remark *: Retains the previous state. **: Indefinite
72
Peripheral hardware control function
b3
b2
Symbol Function outline
b1
b0
ADCCH2
Selects the pin used as an
ADCCH1
A/D converter
ADCCH0
ADCCMP
Detects the comparison result
0
0 Fixed at 0
0
Sets I/O of port 1C (group I/O)
P1CGIO
P1BBIO3
P1B pin
3
P1BBIO2
P1B pin
2
P1BBIO1
P1B pin
1
P1BBIO0
P1B pin
0
P0BBIO3
P0B pin
3
P0B pin
P0BBIO2
2 I/O setting
(bit I/O)
P0B pin
1
P0BBIO1
P0B pin
0
P0BBIO0
P0A pin
3
P0ABIO3
P0A pin
2
P0ABIO2
P0A pin
1
P0A pin
P0ABIO1
0
P0ABIO0
SIO0CH Sets the number of communication lines
Sets the communication method
SB
SIO0MS Sets master/slave
SIO0TX Sets the transfer direction
Sets and detects acknowledge (I
SBACK
Sets the wait permission
SIO0NWT
SIO0WRQ1
Sets the wait mode
SIO0WRQ0
Set value
0
0: AD0
2: AD2
4: AD4
6, 7: Not to be set
V < V
IN REF
Input
Input
2-wire method
Serial I/O method
Master operation Slave operation
Reception
2
C bus method)
Sets and detects 0 and 1
Permitted
0 0 1
Acknow-
No Data
ledge
wait wait
wait
0 1 0
PD17062
At reset
P S C
o
T E
w
O
e
P
r
O
1 n
1: AD1
3: AD3
0 0 0
5: AD5
** * *
V > V
IN REF
0 0 0
Output
0 0 0
Output
3-wire method
2
I C bus method
(only for 2-wire method)
0 0 0
Transmission
Released
1
0 0 0
Ad-
dress
wait
1