Btm0Md (09H); Intvsyn (0Fh, B 2 ) - NEC PD17062 Datasheet

Mos integrated circuit 4-bit single-chip microcontroller containing pll frequency synthesizer and image display controller
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9.5 BTM0MD (09H)

b
b
3
BTM0ZX
BTM0CK2
9.6 INTVSYN (0FH, b
)
2
The INTVSYN flag is used for reading the vertical synchronous signal level. When a high level signal is
input to the V
pin, the flag is set to 1. When a low level signal is input to the V
SYNC
to 0.
09H
b
b
2
1
0
BTM0CK1
BTM0CK0
Time base setting
0
0
0
0
1
1
1
1
Zerocross setting
0
1
TIMER INT
0
0
5 ms
Internal
0
1
100 ms
Internal
1
0
20 ms
Internal
1
1
20 ms
Internal
0
0
5 ms
Internal
0
1
5/f
s
External
TMR
1
0
5 ms
Internal
6/f
s
External
1
1
TMR
Zerocross off
Zerocross on
PD17062
TIMER CARRY
100 ms
Internal
5 ms
Internal
100 ms
Internal
5 ms
Internal
5/f
s
External
TMR
5 ms
Internal
6/f
s
External
TMR
5 ms
Internal
pin , the flag is reset
SYNC
77

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