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14. RESET
The reset function is used to initialize device operation.
14.1 RESET BLOCK CONFIGURATION
Fig. 14-1 shows the configuration of the reset block.
Device reset is divided into reset by turning on V
reset).
The power-on reset block consists of a voltage detection circuit that detects the voltage applied to the V
pin, a power failure detection circuit, and a reset control circuit.
The CE reset block consists of a circuit that detects the rising edge of the signal input to the CE pin, and
a reset control circuit.
X
OUT
X
IN
STOP
instruction
Voltage
V
detection
DD
circuit
Rising edge
CE
detection
circuit
(power-on reset or V
DD
Fig. 14-1 Reset Block
Power failure detection block
Scaler
BTM0CY
flag read
R
Q
S
Timer carry
disable FF
Power-on clear signal (POC)
STOP instruction
reset), and reset by CE pin (CE
DD
Timer FF block
Selector
Timer carry FF
Reset signal
Forced halt by
IRES
timer carry FF
Reset
RES
Control register
control
System register
circuit
RESET
Stack
Program counter
PD17062
DD
171
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