NEC PD17062 Datasheet page 185

Mos integrated circuit 4-bit single-chip microcontroller containing pll frequency synthesizer and image display controller
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CE = low
BTM0CY flag setting
disabled state
&
STOP 0
Clock-stop
/
STOP 0
Clock-stop
BTM0CY
flag setting
enable state
Fig. 14-10 BTM0CY Flag State Transition
CE = optional
#
V
= low
DD
Operation stopped
$
V
DD
Clock oscillation start
Forced halt (approx. 50 ms)
%
Power-on reset
CE = L
(
CE = H L
Normal
operation
CE = L H
CE = L H
-
.
SKT1 BTM0CY or
SKT1 BTM0CY or SKF1 BTM0CY
SKF1 BTM0CY
0
CE = H L
Normal
operation
CE = L H
CE = L H
CE = high
= L 3.5 V
CE = H
)
*
BTM0CY = 0
Normal
operation
+
Normal operation
,
CE reset wait
Clock oscillation start
Forced halt (50 ms)
1
2
BTM0CY = 1
Normal
3
operation
Normal operation
4
CE reset wait
Clock oscillation start
Forced halt (50 ms)
PD17062
CE reset
Rising edge of
timer carry FF
set pulse
CE reset
Rising edge of
timer carry FF
set pulse
185

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