NEC PD17062 Datasheet page 122

Mos integrated circuit 4-bit single-chip microcontroller containing pll frequency synthesizer and image display controller
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11.7.2 Functions
An interrupt can be issued when either a rising or falling edge is input to the INT
Use the IEGNC or IEGVSYN flag in the interrupt edge select register of the control register to select the rising
or falling edge.
Table 12-2 shows the relationship between the IEGNC and IEGVSYN flags and the active edges of interrupt
requests.
Note the following:
If the IEGNC or IEGVSYN flag is used to switch the interrupt request edge, an interrupt request signal may
be issued at the moment of switching.
Suppose that the IEGNC flag is set to 0 (falling edge) and a high level is input to the INT
in Table 11-3. At this time, if the IEGNC flag is set to 1, the edge detector determines that a rising edge has
been input and therefore issues an interrupt request.
See Section 11.2 for operations after interrupt request issuance.
Because the signals input to the INT
in Fig. 11-5, the input signal levels can be detected by reading the INTNC and INTVSYN flags.
Because the INTNC and INTVSYN flags are set or reset regardless of interrupts, they can be used as 2-bit
general-purpose input ports when the corresponding interrupt functions are not used.
If interrupt is not permitted, the flags can be used as general-purpose ports that can detect a rising or falling
edge by reading the interrupt request flags (IRQNC or IRQVSYN). However, because the interrupt request flags
are not automatically reset in this case, they must be reset by the program.
Table 11-2 IEGNC and IEGVSYN Flags and Interrupt Request Issuance Edges
122
and V
pins are input to the INTNC and INTVSYN latches as shown
NC
SYNC
Flag values
IEGNC
INTVSYN
0
0
0
1
1
0
1
1
Active edges of interrupt
request pins
INT
pin
V
pin
NC
SYNC
Rise
Rise
Rise
Fall
Fall
Rise
Fall
Fall
PD17062
or V
pin.
NC
SYNC
pin as shown
NC

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