NEC PD17062 Datasheet page 31

Mos integrated circuit 4-bit single-chip microcontroller containing pll frequency synthesizer and image display controller
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5.1.1 Structure of the System Register (SYSREG)
The system register consists of 12 nibbles, located at addresses 74H to 7FH in data memory. The system
register is allocated regardless of the bank. That is, the system register is always located at addresses 74H
to 7FH, regardless of the bank.
Fig. 5-2 shows the structure.
Address
74H
75H
Register
Address register
(symbol)
(AR)
5.1.2 Structure of the Data Buffer (DBF)
The data buffer consists of four nibbles located at addresses 0CH to 0FH of BANK0 in data memory.
Fig. 5-3 shows the structure.
Fig. 5-2 Structure of the System Register
System register (SYSREG)
76H
77H
78H
79H
Window
Bank
register
register
(WR)
(BANK)
Fig. 5-3 Structure of the Data Buffer
Data buffer (DBF)
0CH
0DH
Address
Symbol
DBF3
DBF2
7AH
7BH
7CH
7DH
Index register (IX)
General-purpose
register pointer
Data memory row
address pointer
(MP)
0EH
0FH
DBF1
DBF0
PD17062
7EH
7FH
Program
status word
(RP)
(PSWORD)
31

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