Mitsubishi Electric MELSEC iQ-R Series User Manual page 237

CH1 Open side transistor output flag
For details on this area, refer to the following:
Page 234 CH1 Transistor output flag
■Buffer memory address
The following shows the buffer memory address of this area.
*1
Buffer memory area name
CH Open side transistor output flag
CH Open side transistor output flag (in the Q compatible mode)
*1 In GX Works3, CH Transistor output flag is displayed as the sample comment of CH Open side transistor output flag.
CH1 Set value (SV) monitor
The set value (SV) of each unit time set in 'CH1 Setting variation rate limiter unit time setting' (Un\G526) is stored in this buffer
memory area. ( Page 280 CH1 Setting variation rate limiter unit time setting)
The set value (SV) can be monitored in real time.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory area name
CH Set value (SV) monitor
CH Set value (SV) monitor (in the Q compatible mode)
CH1 Manipulated value (MV) for output with another analog module
The values stored in the following buffer memory areas are converted for other analog modules on the system (such as a D/A
converter module) and stored in this buffer memory area.
Buffer memory area name
CH1 Manipulated value (MV)
The range of the values to be stored differs depending on the resolution set in the following buffer memory area. (0 to 4000, 0
to 12000, 0 to 16000, 0 to 20000, 10 to 32000)
• 'Manipulated value resolution change for output with another analog module' (Un\G308) ( Page 227 Manipulated value
resolution change for output with another analog module)
When the device that executes heating or cooling can receive only analog inputs, use other analog modules
(such as a D/A converter module) to convert digital inputs to analog output values.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory area name
CH Manipulated value (MV) for output with another analog module
CH Manipulated value (MV) for output with another analog module (in the Q
compatible mode)
CH1
405
21
CH1
406
25
Buffer memory address
403
CH1
407
177
CH2 CH3
605 805
22 23
CH2 CH3
606 806
26 27
Reference
Page 232 CH1 Manipulated value (MV)
CH2 CH3
607 807
178 179
Appendix 3 Buffer Memory Areas
CH4
1005
24
CH4
1006
28
A
CH4
1007
180
APPX
235