Omron SYSMAC CS Series Operation Manual page 200

Improved Instructions
Note
180
Content of the First Word Address of Linear Data (T)
15 14 13 12 11 10 9 8
0 0 0 1 1 0 0
T
Data length specification for S and D
0: 16-bit binary data
1: 32-bit binary data
Signed data specification for S and D
0: Unsigned
1: Signed
16-bit binary data
X0
T+1
T+2 Y0
T+3 X1
Y1
T+4
X2
T+5
Y2
T+6
to
Xn
Yn
to
T+(2m+1) Xm
T+(2m+2) Ym
1. X1 < X2 < Xm is assumed to be true. BIN data is stored as the linear data
(Xm, Ym) regardless of Input/Output specified with control data.
2. For details of when "unsigned" is specified (T's bit 11 = 0), refer to Custom-
izable Counter Units PROGRAMMING MANUAL (W384).
3. Please be aware that the setting of T here differs from the one with APR
instruction of CS1 CPU unit.
Content of the Word Address of Input Data (S)
To specify the Word Address in which Input Data Has Been Stored
In this case, the content of the word address specified in S becomes the input
data without any data modification. BIN 16 bit or BIN 32 bit is used for the
input data.
S: First word address of input data
Content of Calculation Result (D)
The calculation result based on the input data is output to this word address.
The result is either in BIN 16 bit or BIN 32 bit.
7 6 5 4 3 2 1 0
m−1 (00 to FFHex)
m: Number of coordinates minus one (0 < m < 257)
Input data S
00: The data in word address which is specified in S
01: High-speed counter 1 PV
11: High-speed counter 2 PV
T+1
T+2
T+3
T+4
T+5
T+6
T+7
T+8
to
T+(4n+1)
T+(4n+2)
T+(4n+3)
T+(4n+4)
to
T+(4m+1)
T+(4m+2)
T+(4m+3)
T+(4m+4)
Section 7-14
32-bit binary data
X0 (rightmost 16 bits)
X0 (leftmost 16 bits)
Y0 (rightmost 16 bits)
Y0 (leftmost 16 bits)
X1 (rightmost 16 bits)
X1 (leftmost 16 bits)
Y1 (rightmost 16 bits)
Y1 (leftmost 16 bits)
to
Xn (rightmost 16 bits)
Xn (leftmost 16 bits)
Yn (rightmost 16 bits)
Yn (leftmost 16 bits)
to
Xm (rightmost 16 bits)
Xm (leftmost 16 bits)
Ym (rightmost 16 bits)
Ym (leftmost 16 bits)