Omron SYSMAC CS Series Operation Manual page 120

AR Area
Address Bits
AR 08 00 High-speed counter 1
status
01
02
03
04 ABS PV read status
05
100
Function
Target
Value
Compari-
son Flag
Overflow/
Underflow
Flag
(Reserved
by sys-
tem.)
Phase-Z
Input
Reset
Flag (ON
for one
cycle)
ABS No.
of rota-
tions read
error
ABS No.
of rota-
tions read
completed
Details
OFF: In Target Comparison Mode
for the CTBL instruction, indicates
that comparison is not in progress.
Note: This flag is always OFF in
range comparison mode for the
CTBL instruction.
ON: In Target Comparison Mode
for the CTBL instruction, indicates
that comparison is in progress.
Note: Unlike range comparison,
once target value comparison is
started, it is continuously exe-
cuted. This bit can be used to con-
firm whether or not comparison is
actually in progress.
OFF: In Linear Counter Mode,
there is no overflow or underflow.
In Ring Counter Mode, this flag is
always 0.
ON: In Linear Counter Mode, an
overflow or underflow has
occurred. The high-speed counter
PV is fixed at one of the upper lim-
its. This flag is cleared when the
High-speed Counter Start Bit is
turned OFF.
---
If the high-speed counter reset
method is phase Z + software
reset (1 Hex is set in bits 04 to 07
in DM 6605), this flag turns ON for
one cycle when the high-speed
counter's PV is reset.
Note: If the phase-Z signal (reset
input) turns ON while the High-
speed Counter Reset Bit (bit 01 in
AR 09) is ON, this flag turns ON for
one cycle when the high-speed
counter's PV is reset.
0: No error
1: Error occurred
0: Not reading or reading
1: Reading completed (This is set
at the completion of receiving
serial data on No. of rotations.)
Section 6-4
Controlled Forced
by set/reset
Unit Enabled