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Performance Computer PT-VME161 Manuals
Manuals and User Guides for Performance Computer PT-VME161. We have
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Performance Computer PT-VME161 manual available for free PDF download: User Manual
Performance Computer PT-VME161 User Manual (140 pages)
Extensible Single Board Computer/Controller
Brand:
Performance Computer
| Category:
Controller
| Size: 1 MB
Table of Contents
Copyright Notice
2
Safety Information
4
Safety Precautions
4
Table of Contents
5
Section 1 PT-VME161 INTRODUCTION
15
Scope
15
Applicable Documents
16
Model Designations
17
Features
18
Family Members
20
Pt-Vme131/131E
20
Pt-Vme141/141E
21
Pt-Vme151A/151Ae
21
Glossary and Conventions
22
Glossary
22
Conventions
23
Section 2 GETTING STARTED
25
Unpacking and Inspection
25
Hardware Configuration
26
Device Positions
26
Figure 1: PT-VME161 Device Positions
26
U24 PROM/ROM/SRAM/EEPROM Socket Configuration
28
Figure 2: EPROM/ROM/SRAM/EEPROM Device Orientation
28
Figure 3: K4 and K10Jumpers
29
Figure 4: K3 and K11 Jumpers
29
Location U24 Setup
29
Location U36 Setup
29
Figure 5: U24 and U36 Jumper Settings
30
SCSI Termination
31
Disabling Termination
31
Figure 6: SCSI Components
31
Termination Power Source
31
TERMPWR Overview
31
DRAM Module Upgrading
33
EPAK Installation
34
Board Installation
35
Power Considerations
35
Slot Considerations
35
Backplane Insertion
35
Figure 7: PT-VME161 Front Panel
36
SCSI Considerations
37
Cabling
37
Example
37
Figure 8: Example SCSI Cable
38
Mechanical Restraints
38
SCSI Device Grounds
38
Device Addresses
39
Serial Port Cabling
39
Example
39
Mechanical Restraints
40
Figure 9: Example Serial Port Cable
40
Section 3 FUNCTIONAL DESCRIPTION
41
Figure 10: Block Diagram
41
Microprocessor
42
Memory
42
Dram
42
DRAM Mapping
43
Sizing
43
Parity
44
Checking
44
Initialization
45
Testing
45
PROM/SRAM Sockets
45
Nonvolatile SRAM and Time of Day/Calendar Clock
45
Serial EEPROM
45
Figure 11: Interval Timer Block Diagram
46
Interval Timer
46
Vmebus Interface
47
Scv64
47
Decoupled
47
Transfer Modes
47
VME 64 Transfers
47
Atomic
48
Vmebus Control Logic
48
68060 Accesses
49
EPAK Access from the Vmebus
49
SCV64 Register Access from the Vmebus
49
Vmebus Master Accesses
49
Vmebus Slave Accesses
49
Dmac
50
Read-Modify-Write
50
Location Monitor
51
Registers
51
Test and Diagnostics
51
Local Bus Timer
52
Reset
52
Tick Timer
52
Watchdog Timer
52
Abort
53
Interrupt Handler
53
Local Level 7 Sources
53
Register Block
53
AC Fail
54
General Purpose Local Interrupts
54
Location Monitor FIFO
54
SCSI Bus Reset
54
System Fail
54
Figure 12: Timer Block Diagram
55
SCV64 VME Event
55
Tick
55
Timer Event
55
EPAK Requests (-EPIRQ)
56
EPAK Vectored Interrupt Request
56
FAS216 Requests
56
I/O Event
56
Interval
56
DUART Interrupt Request (-INTP<5>)
57
Interrupt Acknowledgment
57
Vmebus Interrupts
57
Vmebus Requester
57
IACK Daisy Chain Driver
58
Reset
58
System Clock Driver
58
System Monitor Functions
58
Vmebus Arbiter
58
Bus Timer
59
I/O Utilities
59
System Control Registers
59
System Control Register 1
59
User Leds
59
Vmebus Page Select
59
EPAK Space Cache Enable
60
SCSI DMA Read/Write Direction
60
System Control Register 2
60
Table 1: EPAK Caching Options
60
Vmebus Space Cache Enable
60
Enable Bad Parity
61
Enable EPAK Access from the Vmebus
61
Enable Parity Error Checking
61
Enable Bus Snooping
62
Enable Interval Timer Interrupts
62
Enable Tick Timer Interrupts
62
System Status Registers
63
68060 Parity Error
63
DARF Parity Error
63
Hex Switch
63
SCSI DMA Parity Error
63
System Status Register 1
63
System Status Register 2
63
DRAM Size
64
EPAK Parity Error
64
Interval Timer Interrupt Pending
64
Parity Installed
64
SCSI Present
64
System Status Register 3
64
Duart
65
Clear-To-Send
65
Data-Terminal-Ready
65
General Purpose Timer/Counter
65
Parallel Input Port
65
Utility Serial Ports
65
Data-Set-Ready
66
EPAK General Purpose Input
66
EPAK General Purpose Output
66
Parallel Output Port
66
Request-To-Send
66
Serial EEPROM Control
66
Serial EEPROM Data in
66
Serial EEPROM Select
66
Serial EEPROM Data out
67
SCSI Controller
68
SCSI Bus
68
Register Access
68
DMA Mechanism
69
Interrupts
69
Termination
69
EPAK Interface
71
Section 4 FUNCTIONAL SUMMARY
73
Memory Map
73
Table 2: Memory Map
73
Default Vmebus Slave Addressing
74
Table 3: Default Vmebus A24 Memory Map
74
Table 4: Default Vmebus A32 Memory Map
74
161 System Registers
75
System Control Register 1
75
System Control Register 2
77
System Status Register 1
78
System Status Register 2
79
System Status Register 3
80
SCSI Memory Address Register
81
Jumper List (Defaults)
81
Interrupt Control
82
Table 5: Interrupt Request Summary
82
Register Maps
83
Scv64
83
Table 6: SCV64 Register Map
83
DS1643 Nonvolatile Timekeeping RAM
85
82C54 Interval Timer
85
Table 7: DS1643 Nonvolatile Timekeeping RAM Registers
85
Table 8: 82C54 Interval Timer Registers
85
EMULEX FAS216 SCSI Controller
86
68681 Duart
86
Table 9: EMULEX FAS216 SCSI Controller Register Map
86
Table 10: Motorola 68681 DUART Register Map
86
Controls and Indicators
87
Rotary Switch
87
Figure 13: PT-VME161 Front Panel Controls and Indicators
87
RUN" Indicator
88
FAULT" Indicator
88
VME" Indicator
88
RESET Switch
88
ABORT Switch
88
User Programmable Leds
88
Section 5 CONNECTOR PINOUTS
89
Utility Serial Port Pin Assignments
89
Table 11: Utility Serial Port Pin Assignments
89
Vmebus Pin Assignments
90
Table 12: Vmebus "P1" Connections
90
Table 13: Vmebus" P2" Connections
91
EPAK Connectors
92
Table 14: EPAK Connections
92
DRAM Module
93
Table 15: EPAK Mounting Standoffs
93
Table 16: DRAM Module Connections
93
Table 17: EPAK Mounting Standoffs
94
Section 6 MECHANICAL and ENVIRONMENTAL
95
Power Requirements
95
Ambient Temperature
95
Humidity
95
Vibration
95
Table 18: Power Requirements
95
Table 19: Ambient Temperature
95
Table 20: Humidity Constraints
95
Mechanical Shock
96
Physical Dimensions
96
Table 21: Physical Dimensions
96
Section 7 APPENDICES
97
Product Warranty
97
Product Return Procedure
98
Product Support
99
Installation Notes
100
EEPROM Usage
101
Ptbug
101
Table 22: EEPROM Default Values
102
Os-9
102
The Differences between the PT-VME161 and the VME151
104
Scv64
104
Differences
104
68060 Versus 68040
105
The Differences between the PT-VME151A and the VME151
106
Renamed Registers
106
New Devices
106
DRAM Sizing
106
Table 23: 151 to 161 Register Map Differences
106
SRAM Access
107
PT-VME151A Differences from VME131/141
108
DARF64 Uses 68040 Mode
108
SCSI Controller Differences
108
Effects of 68040 Vs. 68030
108
Cacheability and Serialization
108
68040 Cache Control Registers
109
68040 Cache Clearing
110
68040 Exception Processing
110
PT-VME151A Control Register Differences
110
Table 24: EPAK Caching
110
SCV64 Overview
112
Functional Description
112
BI-Mode
112
Location Monitor
113
Vmebus Master Memory Map
113
Figure 14: SCV64 Memory Map
114
Master Vmebus Accesses
115
Slave Vmebus Accesses
116
AVICS Application Notes
118
Local Interrupts
118
Example
118
Table 25: Recommended Interrupt Assignments
118
Setting up the Master Bus Memory Map
119
Example
119
Setting up A24/A32 Slave Images on the Bus
119
Example a
120
Example B
121
Generating Vmebus Interrupts
122
Example
122
Receiving Vmebus Interrupts
122
Initiating a DMA Transfer
123
Example
123
Vmebus Address Modifiers
125
Table 26: Vmebus Address Modifiers
125
Section 8 SCHEMATICS
137
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