A3.1.1 R51 Circuit Diagram (Page 1/12)
1. Block diagram
The circuit diagram shown on page 1/12 consists of an input/output gate array IC2 (IOGA4), crystal oscillator circuit
and reset signal generator.
Figure A3.1.1 shown the block diagram of IC2 (IOGA4) and the peripheral circuits.
2. Function
1) IOGA4 is newly developed LSI for scanning, printing control and provided with a built-in
CPU.
- IOGA4 contains the following functions:
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Scanning sensor control
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Various image data processing control for scanning data
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Strobe signals control for LED head
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Smoothing control for printing data
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Interface of the peripheral LSI
- CPU
CPU controls the following functions in addition to the basic processor.
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DMA (Direct Memory Access) control
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Interrupt procedure control
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A/D converter
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Bus state control
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Programmable pattern control
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16 bit integrated timer pulse unit (ITU)
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Timing pattern control (TPC)
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Serial communication interface (SCT)
2) Crystal oscillator circuit
X1 is 20MHz crystal oscillator. The output wave is fed to the IOGA4 (CPU) through pin 14 and 15. CLK (20MHz)
signal output from pin 94 is used as the system clock.
Service Guide OKIOFFICE 84
Chapter A Board Descriptions
Page: 229