Qdr Control Bwe# Signals Routing Topology; Qdr Control Bwe# Signal Group Routing Guidelines - Intel IXP28XX Manual

IXP28XX Network Processor
QDR SRAM
Figure 40.
Table 31.
78
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QDR Control BWE# Signals Routing Topology

Daisy-Chained
Control Signals
WE#0, WE#1 Pins
Intel ®
IXP2800 Driver
WE#
A
Table 31 provides routing guidelines for the QDR control BWE# signal group.

QDR Control BWE# Signal Group Routing Guidelines

Parameter
Signal Group
Topology
Reference Plane
Characteristic Trace Impedance
RTT
Nominal Trace Width
Nominal Trace Separation
Group Spacing
1
Trace length P +A to SRAMs
Trace length B
Trace length C
Trace length D
Maximum via count per signal
Length tuning method
1. P refers to the package length.
Figure 41 illustrates routing for control BWE# signal trace width/spacing.
V = 0.75V
TT
R = 35
TT
D
CONTROL BWE#
Daisy Chain or Balanced-T topology
Ground
33 Ω ±10%
35 Ω ±1%
5 mils
15 mils or more
Isolation from all other signals is 20 - 25mils.
Should be matched to K-Clk trace length minus 0.5 inches.
Maximum = 11.0 inches
As short as possible.
Maximum = 0.4 inches
Maximum = 0.5 inches
As short as possible; Maximum = 1.0 inch
As small as possible; Maximum = 7 vias
All CONTROL signals matched within ±25 mils, where
length includes package length compensation (P+A)
Top
SRAM
ottom
SRAM
C
3959-01
Routing Guideline
Hardware Design Guide