C, C#, Cin, And Cin# Clocks Topologies; Tcam/Sram/Coprocessor Interface Guidelines (C, C#, Cin, And Cin# Clocks) - Intel IXP28XX Manual

Network processors hardware design guide
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Table 34.
Hardware Design Guide
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C, C#, CIN, and CIN# Clocks Topologies

®
Intel
IXP2800 Driver
Cout, Clock
C, C#
®
Intel
IXP2800 Receiver
Cin, Clock
CIN, CIN#
On-Die Termination 50
Table 34
provides routing guidelines for the TCAM/SRAM/coprocessor interface base card.

TCAM/SRAM/Coprocessor Interface Guidelines (C, C#, CIN, and CIN# Clocks)

Parameter
Signal Group
Topology
Reference Plane
Characteristic Trace Impedance
Nominal Trace Width
Nominal Trace Separation for group
Group spacing
IXP28XX breakout guideline
A or B trace length
IXP28XX Network Processor
A
B
Routing Guideline
TCAM/SRAM/coprocessor C, C#, CIN, and CIN# Clocks
Point-to-Point
Ground
50 Ω ±5%
5 mils
8 to 15 mils
Isolation from non-QDR and non-group-related signals is
20 mils.
3.5 mils with 4-mil space for a maximum of 400 mils
Maximum = 5.0 inches (IXP28XX pin to Mictor* pin)
The trace length from ball-to-ball should be within 25 mils.
QDR SRAM
MICTOR
Connector
B3961-01
83

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