3.1.2.
DIP Switch SW4
The DIP switch SW4 serves for CompactPCI and PMC PCI interface configuration.
Table 26: DIP Switch SW4 Functionality
SWITCH
1
2
3
4
3.2. System Write Protection
The CP6007 provides write protection for non-volatile memories via the DIP switch SW3, the uEFI Shell and a
backplane pin. If one of these sources is enabled, the system is write protected. Please contact Kontron for further
information before using these functions.
3.3. CP6007-Specific Registers
Table 27: CP6007-Specific Registers
ADDRESS
DEVICE
0x284
Write Protection Register (WPROT)
0x285
Reset Status Register (RSTAT)
0x288
Board ID High Byte Register (BIDH)
0x28A
Geographic Addressing Register (GEOAD)
0x28C
Watchdog Timer Control Register (WTIM)
0x28D
Board ID Low Byte Register (BIDL)
0x290
LED Configuration Register (LCFG)
0x291
LED Control Register (LCTRL)
0x292
General Purpose Output Register (GPOUT)
0x293
General Purpose Input Register (GPIN)
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SETTING
FUNCTIONALITY
OFF
CompactPCI frequency 33/66 MHz, auto detection via the backplane
ON
CompactPCI frequency configured to 33 MHz
OFF
CompactPCI mode (PCI/PCI-X) auto detection via the backplane
ON
CompactPCI interface configured to PCI mode
OFF
PMC PCI frequency 33/66 MHz, auto detection via the PMC interface
ON
PMC PCI frequency configured to 33 MHz
OFF
Reserved
ON
CP6007-SA, CP6007-RA – User Guide, Rev. 1.0
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