ABB RELION 670 Series Technical Manual page 216

Section 7
Impedance protection
INMag
3I0Enable_PG
3I0BLK_PP
Imin
I3P
V3P
R,X settings
21 enable
IPELm
Pickup Iph
Pickup_N
50/51 enable
IPELm
m = AG, BG, CG
mn = AB, BC, CA
ANSI18000010 V1 EN-US
Figure 91: General phase-selection logic diagram
Figure 92
operating conditions. Consider only the corresponding part of measuring and logic circuits, when
only a phase-to-ground or phase-to-phase measurement is available within the IED.
21 enable
LDEblock

3 I
0
3 0

3 I
0

3I
0

3 I
0
ANSI09000149 V4 EN-US
Figure 92: Phase-to-phase and phase-to-ground operating conditions (residual current
A special attention is paid to correct phase selection at evolving faults. A DLECND output signal is
created as a combination of the load encroachment characteristic and current criteria, refer to
figure 92. This signal can be configured to STCND functional input signals of the distance
210
Residual current
based PhSel.
PP
PE
PP
STZPHLmn
PE
X
STZPHLm
R
LEPHLm
LEPHLmn
Enable
I_A
IRELPE
IRELPP
R
OR
Relative current
RELPHLmn
based PP release
detection
presents schematically the creation of the phase-to-phase and phase-to-ground
AND

0.5 IMinPUPG
AND
I Enable PG _

Iph
max
100
BLOCK
IMinPUPG
AND
3 0 I BLK _ PP

Iph
max
100
criteria)
PHSLmn
AND
OR
PHSLm
AND
OR
AND
AND
AND
0
15ms
Bool to
integer
0
AND
15ms
10ms 0
20ms
0
1MRK 502 066-UUS B
PHPH_FLT
PHG_FLT
Binary to word
b1 – b3
word
b4 – b6
T
PHSELZ
63
F
Binary to word
b1 – b3
DLECND
word
b4 – b6
ANSI18000010-1-en.vsdx
IRELPG
STPG
DLECND
AND
STPP
IRELPP
ANSI09000149-4-en.vsd
Technical manual