Control Registers; Pwg V D1 Regulator Control Register; Clg System Clock Control Register - Epson S1C17M01 Technical Manual

2 POWER SUPPLY, RESET, AND CLOCKS

2.6 Control Registers

PWG V Regulator Control Register
D1
Register name Bit
PWGVD1CTL 15–8 –
7–2 –
1–0 REGMODE[1:0]
Bits 15–2 Reserved
Bits 1–0 REGMODE[1:0]
These bits control the internal regulator operating mode.
PWGVD1CTL.REGMODE[1:0] bits

CLG System Clock Control Register

Register name Bit
CLGSCLK 15
14
13–12 WUPDIV[1:0]
11–10 –
9–8 WUPSRC[1:0]
7–6 –
5–4 CLKDIV[1:0]
3–2 –
1–0 CLKSRC[1:0]
Bit 15 WUPMD
This bit enables the SYSCLK switching function at wake-up.
1 (R/WP): Enable
0 (R/WP): Disable
When the CLGSCLK.WUPMD bit = 1, setting values of the CLGSCLK.WUPSRC[1:0] bits and the
CLGSCLK.WUPDIV[1:0] bits are loaded to the CLGSCLK.CLKSRC[1:0] bits and the CLGSCLK.
CLKDIV[1:0] bits, respectively, at wake-up from SLEEP mode to switch SYSCLK. When the CLG-
SCLK.WUPMD bit = 0, the CLGSCLK.CLKSRC[1:0] and CLGSCLK.CLKDIV[1:0] bits are not
altered at wake-up.
Notes: • When the CLGSCLK.WUPMD bit = 1, the clock source enable bits (CLGOSC.EXOSCEN,
CLGOSC.OSC1EN, CLGOSC.OSC3BEN) except for the SYSCLK source selected by the
CLGSCLK.CLKSRC[1:0] bits will be cleared to 0 to stop the clocks after a system wake-
up. However, the enable bit of the clock source being operated during SLEEP mode by
setting the CLGOSC.****SLPC bit retains 1 after a wake-up.
• When the CLKSCLK.WUPMD bit = 1, be sure to avoid setting both the CLGSCLK.WUP-
SRC[1:0] bits and the CLGSCLK.WUPDIV[1:0] bits to the same values as the CLGSCLK.
CLKSRC[1:0] bits and the CLGSCLK.CLKDIV[1:0] bits, respectively. If the same clock
source and division ratio as those that are configured before placing the IC into SLEEP
mode are used at wake-up, set the CLKSCLK.WUPMD bit to 0.
Bit 14 Reserved
2-12
Bit name Initial
0x00
0x00
0x0
Table 2.6.1 Internal Regulator Operating Mode
0x3
0x2
0x1
0x0
Bit name Initial
WUPMD 0
– 0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Seiko Epson Corporation
Reset R/W
– R –
– R
H0 R/WP
Operating mode
Economy mode
Normal mode
Reserved
Automatic mode
Reset R/W
H0 R/WP –
– R
H0 R/WP
– R
H0 R/WP
– R
H0 R/WP
– R
H0 R/WP
S1C17M01 TECHNICAL MANUAL
Remarks
Remarks
(Rev. 1.2)