D1 Regulator Operation Mode; System Reset Controller (Src); Overview - Epson S1C17M12 Technical Manual

2 POWER SUPPLY, RESET, AND CLOCKS
2.1.3 V Regulator Operation Mode
D1
The V regulator supports two operation modes, normal mode and economy mode. Setting the V
D1
economy mode at light loads helps achieve low-power operations. The following shows an example of light load
conditions in which economy mode can be set.
Light load condition: SLEEP mode (only when all oscillators are stopped)
The V regulator also supports automatic mode in which the hardware detects a light load condition and automati-
D1
cally switches between normal mode and economy mode. Use the V
cial control is required.

2.2 System Reset Controller (SRC)

2.2.1 Overview

SRC is the system reset controller that resets the internal circuits according to the requests from the reset sources to
archive steady IC operations. The main features of SRC are outlined below.
• Embedded reset hold circuit maintains reset state to boot the system safely while the internal power supply is un-
stable after power on or the oscillation frequency is unstable after the clock source is initiated.
• Supports reset requests from multiple reset sources.
- #RESET pin
- POR and BOR
- Key-entry reset
- Watchdog timer reset
- Supply voltage detector reset
- Peripheral circuit software reset (supports some peripheral circuits only)
• The CPU registers and peripheral circuit control bits will be reset with an appropriate initialization condition ac-
cording to changes in status.
Figure 2.2.1.1 shows the SRC configuration.
#RESET
Key-entry reset
Watchdog timer reset
Supply voltage detector reset
Software reset 0
Software reset n
2-2
Clock generator
SRC
V
DD Reset request
signals
Noise filter
V
POR
SS
BOR
Figure 2.2.1.1 SRC Configuration
Seiko Epson Corporation
regulator in automatic mode when no spe-
D1
Boot clock
IOSCCLK
Internal reset signals
(Reset group)
SYSRST_H0
Reset hold
circuit SYSRST_H1
SYSRST_S0_0
Reset
decoder SYSRST_S0_n
S1C17M12/M13 TECHNICAL MANUAL
regulator into
D1
To CPU and peripheral circuits
To CPU and peripheral circuits
To peripheral circuit 0
To peripheral circuit n
(Rev. 1.2)