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Figure 7-2 shows the timing of the operation in this mode when the wait count is 1 (WC1 = "0,"
WC0 = "1").
ø
A
19
RD, AS,
DS (Read)
D –D
7
WR, DS
(Write)
D –D
7
7.3.2 Pin Wait Mode
The pin wait mode is selected when WMS1 = "1" and WMS0 = "0."
In this mode the WAIT function of the P1
The number of wait states indicated by bits WC1 and WC0 are inserted into any bus cycle in
which the CPU or DTC accesses an off-chip address. In addition, wait states continue to be
inserted as long as the WAIT pin is held low. In particular, if the wait count is 0 but the WAIT pin
is Low at the rising edge of the ø clock in the T
goes High.
This mode is useful for inserting four or more wait states, or when different external devices
require different numbers of wait states.
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T
state or T
2
3
–A
0
Read data
0
0
Figure 7-2 Programmable Wait Mode
T
T
1
2
Off-chip address
Write data
/WAIT pin is used automatically.
4
state, wait states are inserted until the WAIT pin
2
131
T
T
W
3
Read data
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