Hitachi H8/500 Series Hardware Manual page 65

Table 3-7 Addressing Modes
No. Addressing Mode
1 Register direct
2 Register indirect
3 Register indirect
with displacement
4 Register indirect
with pre-decrement
Register indirect
with post-increment
5 Immediate
*3
6 Absolute
7 PC-relative
Notes: * 1 Sz: Specifies the operand size.
When Sz = 0: byte operand
When Sz = 1: word operand
* 2 rrr: Register number field, specifying a general register number.
0 0 0 — R0
1 0 0 — R4
* 3 The @aa:8 addressing mode is also referred to as the short absolute addressing mode.
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Mnemonic EA Field
Rn 1 0 1 0 Sz r r r
@Rn 1 1 0 1 Sz r r r
@(d:8,Rn) 1 1 1 0 Sz r r r
@(d:16,Rn) 1 1 1 1 Sz r r r
@–Rn 1 0 1 1 Sz r r r
@Rn+ 1 1 0 0 Sz r r r
#xx:8 0 0 0 0 0 1 0 0
#xx:16 0 0 0 0 1 1 0 0
@aa:8 0 0 0 0 Sz 1 0 1
@aa:16 0 0 0 1 Sz 1 0 1
disp No EA field.
Addressing mode
is specified in the
operation code.
0 0 1 — R1 0 1 0 — R2
1 0 1 — R5 1 1 0 — R6
46
EA Extension
None
*1 *2
None
Displacement (1 byte)
Displacement (2 bytes)
None
Immediate data (1 byte)
Immediate data (2 bytes)
1-Byte absolute address
(offset from BR)
2-Byte absolute address
1- or 2-byte displacement
0 1 1 — R3
1 1 1 — R7