Hitachi H8/500 Series Hardware Manual page 428

P7
n
Figure C-7 (b) Schematic Diagram of Port 7, Pins P7
Table C-7 (b) Port 7 Port Read (Pins P7
Setting
DDR = 0
DDR = 1
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Port Read Data
Pin value
DR value
Reset
R1
Q D
P7 DDR
n
C
WP7D
Reset
R
Q D
P7 DR
n
C
WP7
RP7
, P7 )
1 2
419
WP7D: Write to P7DDR
WP7: Write to Port 7
RP7: Read Port 7
n: 1 or 2
Free-running timer module
Input capture signal
and P7
1 2