Table 1-4 Pin Functions (cont)
Type
Symbol CG-84 FP-80A
Interrupt
NMI
IRQ
0
IRQ
1
Operating MD
2
mode
MD
1
control
MD
0
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Pin No.
CP-84,
I/O Name and Function
22
11
I
8
77
I
9
78
19
8
I
18
7
17
6
NonMaskable Interrupt: Highest-signals priority
interrupt request. The port 1 control register (P1CR)
determines whether the interrupt is requested on the
rising or falling edge of the NMI input.
Interrupt Request 0 and 1: Maskable interrupt
request pins.
Mode: Input pins for setting the MCU operating
mode according to the table below.
MD
MD
MD
Mode
2
1
0
0
0
0
Mode 0 —
0
0
1
Mode 1 Expanded minimum mode
0
1
0
Mode 2 Expanded minimum mode
0
1
1
Mode 3 Expanded maximum mode
1
0
0
Mode 4 Expanded maximum mode
1
0
1
Mode 5 —
1
1
0
Mode 6 —
1
1
1
Mode 7 Single-chip mode
The inputs at these pins are latched in mode select
bits 2 to 0 (MDS2 – MDS0) of the mode control
register (MDCR) on the rising edge of the RES
signal.
18
Description
(ROM disabled)
(ROM enabled)
(ROM disabled)
(ROM enabled)